The present invention relates to a semiconductor device. In particular, it relates to a technique effective to be applied to a System In Package (SIP) type semiconductor device in which a memory chip and a microcomputer chip are mounted over a wiring board.
Described in Patent Document 1 (Japanese Patent Laid-open No. 2008-251917), for example, is an SIP in which a memory chip and a microcomputer chip are mounted over a wiring board.
According to Patent Document 1, equalization of wirings between chips is promoted by providing the SIP as follows. That is, there are mounted, over a module board (wiring board), a plurality of stacked memory chips which a data-processor chip simultaneously accesses. Address system bonding pads of the data-processor chip are connected with address system bonding pads of the memory chip between the memory chips through common/address system wirings. Data system bonding pads of the data processor chip are connected to data system bonding pads of the memory chip through individual data system wirings. With respect to an arrangement of the data system bonding pads of the data processor chip, an arrangement of the data system bonding pads of the memory chip connected through the data system wirings is made such that memory chips are disposed in an alternating sequence.